[International] Synopsys rolls non-volatile memory IP
 
SAN FRANCISCO—EDA and IP vendor Synopsys Inc. Monday (June 27) announced the immediate availability of DesignWAre AEON non-volatile memory (NVM) IP for multiple 180-nm process technologies.

 

 The new products include few-time programmable, multiple-time programmable RFID and erasable programmable read-only memory (EEPROM) IP solutions, Synopsys (Mountain View, Calif.) said. Synopsys offers DesignWare AEON NVM IP for leading process technologies in more than 100 different memory configurations, all qualified to the appropriate industrial specifications, the company said.

 

 The IP is implemented in standard CMOS process technology with no additional mask or process steps required, Synopsys said. It is targeted toward wireless, RFID and analog and mixed-signal SoC designs, the company said.

 

 According to Synopsys, the DesignWare AEON embedded NVM IP requires no high-voltage generation circuitry— all programming and re-programming is done using a standard CMOS technology with no additional masks or process adaption. This allows designs to operate from a single core supply, eliminating the complication of generating a separate, high-voltage signal for NVM programming, or supporting a high-voltage I/O pad, the company said. DesignWare AEON NVM IP also provides support for extended temperature ranges beyond industry standard, the company said.

 

 The DesignWare AEON embedded NVM IP for 180-nm process technology is available now for several leading foundries, Synopsys said. It is also available for leading 65-nm to 250-nm process technologies, the company said.

 

Source: EETimes

 

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